搜索资源列表
Actel-SRAM-Design
- 基于Actel公司反熔丝FPGA的开发程序，实现对SRAM进行操作。-Actel antifuse-based FPGA development process, to achieve the SRAM operation.
ACtel-RTC-hdl
- 基于Actel公司的反熔丝FPGA实现，实现了实时时钟功能。能区分闰年、大月、小月，秒、分、时自动增长。-this application provides a count of seconds, minutes, hours, day of the week, day of the month, month, and year. The month-ending date is automatically adjusted for months with less than
how_to_use_RAM
- actel的fpga ram核使用手册,想入手学习ram的同学可以参考一下。-the techManual of actel fpga ram ipcore，and the beginner can use it easily.
how_to_use_Libero8
- 是libero的使用说明，如果想使用actelfpga的libero软件可以试试它。-the reference of actel fpga soft Libero8.5, and it s good tool for new learner.
fifo
- actel 的同步硬件fifo的testbench,初学者可以看一下testbench怎么写的。-the testbench code of actel fpga,it is right for new learner~
CameraDemo_Toshiba_800x480_v1
- 实时视频采集与再现 actel fpga 工程代码，很有参考价值。-camera demo project
Actel-BLDC-Driver
- Actel生产的FPGA中使用6路PWM控制三相直流无刷电机说明文档-6-channel PWM control three-phase brushless DC motor documentation used in the production of Actel' s FPGA
Vsteepper_motH
- 步进电机 VHDL 控制，整步 半半步 细分 actel FPGA使用 -VHDL control of stepper motor, whole step, half half step segments actel FPGA use
A3P600-PQG208
- Actel FPGA A3P600最小系统原理图，包含JTAG 、电源和封装 -Actel FPGA A3P600 minimum system schematics, including JTAG, power and packaging
FSK
- 推荐一个FSK解调工程，用Actel FPGA 实现的比较通用，VHDL 源代码。-Recommended Actel FPGA implementation FSK demodulator engineering, more generic, VHDL realization.
ADC_3Channal
- Actel FPGA 3通道同时采样程序-Actel FPGA 3 Channel Sample Program
CoreFIR_RTL-3.0
- actelIP核 的fircore Core Generator – Executable File Outputs Run-Time Library (RTL) Code and Testbench Based on Input Parameters – Self-Checking – Executable Tests Generated Output against Algorithm • Distributed Arithmetic (DA) Algori
FFT-algorithm-Generator
- Actel FPGA FFT算法VHDL生成器,附说明。-Actel FPGA FFT algorithm VHDL Generator and introductions
VerilogUart
- UART 串口通信模块，Verilog 实现。已在Microsemi Actel FPGA A3PE1500 硬件验证通过。-UART serial communication module, Verilog implementation. Verified by Microsemi Actel FPGA A3PE1500 hardware.
CoreUartTest
- Actel FPGA UART 串口通信模块，调用Actel CoreUART IP核实现。已在Microsemi Actel FPGA A3PE1500 硬件验证通过。-Actel FPGA UART serial communication module, call Actel CoreUART IP core implementation. Verified by Microsemi Actel FPGA A3PE1500 hardware.
USB3_a3p1000_9.1__
- 8bit10bit编解码、SPI解串、BAT656接受源码，并通过USB3.0 传送至PC机。经测试actel fpga 时钟频率100M可以满足320MB/s的传输速率-8bit10bit encoding and decoding, SPI solution string, BAT656 accept the source code, and through USB3.0 to PC. After testing the FPGA Actel clock frequency 100M can
bldc_motor_control_design_example
- 无刷直流电机 VHDL VERILOG 控制,速度环，RS232 串口接收发送 始终分频 PWM生成 电机相序 actel FPGA使用-VERILOG BLDC control of the use of actel FPGA- actel VERILOG BLDC control of the use of actel FPGA
三角函数的Verilog HDL语言实现
- 以Actel FPGA作为控制核心，通过自然采样法比较1个三角载波和3个相位差为1 200的正弦波，利用Verilog HDL语言实现死区时间可调的SPWM全数字算法，并在Fushion StartKit开发板上实现SPWM全数字算法。(With Actel FPGA as the control core, between 1 and 3 triangular carrier phase difference of 1200 sine wave by natural sampling, rea
Micrium_SmartFusionEvalKit_uCOS-III
- this is ucos3 from micrium for actel fpga
UartRecv
- 利用FPGA实现简单的串口接收驱动程序，actel。(Using FPGA to implement a simple serial port receiver driver, Actel)